The job, in the employer's words
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
Tenstorrent is looking for a Workload Performance Analysis Engineer to help shape the performance of our next-generation RISC-V CPUs across modern datacenter and agentic AI workloads. In this role, you’ll sit at the intersection of hardware and software, bringing real-world applications onto RISC-V platforms, characterizing their behavior, and using workload analysis to uncover opportunities for better CPU performance, efficiency, and scalability. You’ll work closely with CPU architects, RTL designers, software engineers, and compiler teams to understand how demanding workloads exercise the CPU and translate those insights into architectural improvements. From reducing large production workloads for performance modeling to correlating simulation results with hardware behavior, your work will directly influence CPU architecture and performance across cloud, enterprise, and emerging AI workloads.
This role is remote based out of North America.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who You Are
- You have a strong background in CPU performance analysis, workload characterization, or computer architecture, with experience connecting software behavior to hardware performance.
- You understand modern CPU microarchitecture, including superscalar pipelines, speculative execution, memory hierarchies, and vector/SIMD architectures.
- You enjoy digging into complex workloads, using profiling and simulation data to identify bottlenecks and turn analysis into actionable recommendations.
- You’re comfortable working across hardware and software, from CPU microarchitecture and RTL to operating systems, compilers, runtimes, and applications.
- You’re a strong technical communicator who enjoys collaborating with architects, designers, and software engineers on complex performance problems.
What We Need
- PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related field, with strong research or industry experience in workload characterization, benchmark development, performance analysis, or simulation.
- Deep understanding of CPU architecture and RISC-V, including pipelines, speculative execution, vector/SIMD extensions, memory hierarchies, and performance tradeoffs.
- Hands-on experience with performance analysis and simulation tools such as Linux perf, strace, QEMU, or CPU microarchitecture simulators.
- Strong programming skills in C/C++, Python, Bash/Shell, and assembly or intrinsic programming, with experience working close to the hardware/software boundary.
- Strong understanding of systems software, including operating systems, virtualization, compilers, runtimes, and GNU/RISC-V software ecosystems.
What You Will Learn
- How real-world datacenter and agentic AI workloads influence CPU microarchitecture and architectural decisions.
- How to connect workload characterization and performance modeling to CPU design, RTL implementation, emulation, and silicon.
- How hardware/software co-design can improve CPU throughput, scalability, and performance-per-watt efficiency.
- How to analyze complex production workloads and reduce them into representative workloads and traces for architectural exploration.
- How emerging RISC-V capabilities, cloud infrastructure, compiler technology, and AI software stacks are shaping the future of high-performance.
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Requirements mentioned
- You have a strong background in CPU performance analysis, workload characterization, or computer architecture, with experience connecting software behavior to hardware performance.
- You understand modern CPU microarchitecture, including superscalar pipelines, speculative execution, memory hierarchies, and vector/SIMD architectures.
- You enjoy digging into complex workloads, using profiling and simulation data to identify bottlenecks and turn analysis into actionable recommendations.
- You’re comfortable working across hardware and software, from CPU microarchitecture and RTL to operating systems, compilers, runtimes, and applications.
- You’re a strong technical communicator who enjoys collaborating with architects, designers, and software engineers on complex performance problems.
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